Course Details
Digital Systems Design
Course Code ENSE808
EFTS 0.1250
Points 15.00
Level 8
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Prescriptor
Introduces the basic and advanced topics in Field Programmable Gate Arrays (FPGA) and the implementation of digital systems, and processors using a HDL (Hardware Description Language). Covers the fundamentals of digital logic design and simulation with VHDL and Verilog and the concept of parallel processing in advanced computers.
Resources
No Resource is available.
Qualifications
The course is available as part of the following qualifications.
Expand to see requisite details. Points
  AK1325   Master of Engineering   (ME)
180.00
  AK3566   Postgraduate Diploma in Engineering   (PgDipEng)
120.00
  AK1296   Postgraduate Certificate in Engineering   (PgCertEng)
60.00
  AK3751   Bachelor of Engineering (Honours)   (BE (Hons))
480.00
  ICE1   Individual Course Enrolment   (ICE)
0.00
No requisite courses specified.
  SABRD1   Study Abroad   (Study Abroad)
0.00
  INEXCH1   International Exchange (Inbound)   (INEXCH)
0.00
Timetable
2025Semester 2 Standard
Class Stream Starting Ending Day Time Room
ENSE808/W201  21-Jul-2025  20-Oct-2025  MON  10:00 AM - 12:00 PM  WS412 
    22-Jul-2025  21-Oct-2025  TUE  9:00 AM - 11:00 AM  WS412 
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